This invention is concerned generally with semiconductor components and the method of manufacturing those components and, more particularly, with low electrical and thermal impedance semiconductor components and their method of manufacture. There are many applications where a low electrical impedance component is necessary. A few examples of these components are PIN diodes, impatt diodes, step recovery diodes and MOS capacitors.
To obtain a semiconductor device with a low electrical impedance, it is necessary to minimize the thickness of the substrate of the device. A typical low electrical impedance semiconductor device is produced by first fabricating a plurality of the devices on one surface of a selected semiconductor substrate. Next, one of several well-known techniques is used on the other surface to thin the entire substrate to the desired thickness.
Following the thinning of the substrate, a new other surface of the substrate is formed. This new other surface is then metalized to provide means of making electrical contact to that surface and to provide a heat sink for each of the plurality of semiconductor devices. And, finally, a scribe and break step is used to separate the individual semiconductor devices.
There are three widely used thinning techniques which include lapping and polishing, chemical etching, and electrochemical anisotropic etching. All three techniques are used to reduce the thickness of the substrate by working on the other surface of the substrate. The technique of thinning the substrate by lapping and polishing is an old technique that requires additional care as the substrate becomes thinner. When the substrate approaches the desired thinness, the substrate becomes very fragile and can be easily fractured during the final phases of thinning, metalization and separation into individual components.
The second thinning technique, chemical etching, is also well known. This technique is dependent on three factors: temperature, time and the intensity of the chemical reaction between the etchant and the substrate material. This technique, like lapping and polishing, produces a fragile thinned substrate in addition to requiring close control over the three factors which determine the speed and extent of the etching of the substrate.
The third thinning technique, electrochemical anisotropic etching, is a more recent development than the other two techniques and is described in a paper by H. A. Waggener entitled "Electrochemically Controlled Thinning of Silicon", Bell System Technical Journal, March 1970, pp. 473-475. This technique, like the other two, is typically utilized to thin the substrate by working on its other side and produces a fragile, uniformly thin substrate. Unlike the chemical etching technique, this technique is self-controlling. The regions of the substrate to be retained, namely, those layers that form the plurality of semiconductor devices, are passivated electrochemically, while the regions to be removed are not passivated and are chemically removed. In this technique, etching continues until the passivated region is reached, whereupon the etching speed slows by a factor of approximately 150 to 1 and effectively halts.
Following the thinning of the substrate by any of the above techniques, the new other surface of the substrate may be diffused with a gettering element, e.g., phosphorus or HCl, to remove impurities from the operating junctions of the semiconductor devices and thus improve the minority carrier lifetime of each semiconductor component. One gettering technique is described in a paper by P. H. Robinson and F. P. Heiman entitled "Use of HCl Gettering in Silicon Device Processing", Journal of the Electrochemical Society: Solid State Science, Vol. 118, No. 1, January 1971, pp. 141-143.